EE2230 Logic Design Lab 1
Lab 11: VGA
Objective
ü Implement VGA display function.
Prerequisite
ü Fundamentals of logic gates.
ü Logic modeling in Verilog HDL.
ü VGA displaying techniques
Experiments
1 VGA displaying functions.
1.1 Inputs of the VGA controller are clk, reset, en and outputs of the VGA controller are
hsync, vsync, vga_red[3:0], vga_green[3:0], vga_blue[3:0].
1.2 At the beginning or when reset (button) is pressed, the VGA display shows the
image (e.g. amumu.jpg). The VGA image stay still until en (button) is pressed.
1.3 Pressing odd times en button to start/resume scrolling. Pressing even times en
button to pause scrolling. Counter for en press is reset to zero when reset is pressed.
2 Calculator display.
2.1 Combine the key board controller and VGA displaying controller to design a
calculator with 2-digit addition/subtraction/multiplication. The display function
should be the same as usual calculator or APP in the smartphone.
3 TETRIS element generator
3.1 Generate basic elements of TETRIC (as follows) randomly in the VGA monitor, and
plot each of them in the center of the first row of the display, which is a 10 x 20 (WxH)
square 2D playing space.
3.2 Each generated basic element moves down by the step of a square at the speed of
1Hz. Finally, they disappear below the playing space. When a basic element
disappears, a new basic element is generated again and fall down again repeatedly.
3.3 (Bonus) The same function of 3.1 and 3.2 are designed except that basic elements are
stacked up until they are higher than the height of the playing space.
TA:
