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Lab 5 Memories and Index Registers

CSC 230 
1
Lab 5 Memories and Index Registers
Submit lab5.asm at the end of your lab, not your project.
I. AVR ATmega2560 Memories
Program storage: Flash memory (.cseg directive)
Data storage: SRAM and EEPRROM (.dseg and .eseg directives)
The Configuration Summary of ATmega2560:
1
The diagram of the program flash memory1
:
What is the largest flash memory address of ATmega2560?
Based on the above table, the memory size is 256KB - 218Bytes -217words, the largest word
address is 0x1FFFF(17bits).
CSC 230 Fall 2016
2
The diagram of the SRAM1
:
II. Index Registers
Data Direct Addressing:
We practiced the following instruction in the previous labs:
lds R0, msg
sts msg, R0
In general, the instruction takes the form of “lds Rd, k”, where the value of k is a 16-bit unsigned
integer representing memory address of the SRAM (data memory). The content (1 byte) stored in
memory address k is loaded to register Rd.
Data Indirect Addressing:
The AVR processor has three register pairs that can be used for data indirect addressing. The three
register pairs (also called index registers) are:
X - R27:R26 or XH :XL
Y - R29:R28 or YH :YL
Z - R31:R30 or ZH :ZL
CSC 230 Fall 2016
3
The address to be accessed must be preloaded into either X, Y, or Z register. What do the following
statements do?
LD Rd, X
ST X, Rr
LPM R23, Z+
Indirect addressing is especially suited for accessing arrays, tables, and Stack Pointer.
III. Download lab5.asm and finish the program.
A C-style string (C string) is stored in the program memory (flash memory).
1. Write a short program to calculate the length of the string
2. Expand the above program to copy the string from the program memory (flash) to the data
memory (SRAM).
Submit lab5.asm at the end of your lab.
This lab is derived from Chapters 5 and 12 of your textbook (Some Assembly Required by Timothy
S. Margush) and the datasheet of ATMEGA 2560 available in AVR Resources folder on conneX.
1. The diagrams are copied and modified from the datasheet mentioned above.

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